Thesis Topic Details

Topic ID:
3239
Title:
QB50 satellite payload implementation
Supervisor:
Oliver Diessel
Research Area:
Embedded Systems, Fault tolerance, Configurable system
Associated Staff
Assessor:
Hui Wu
Topic Details
Status:
Active
Type:
R & D
Programs:
CS CE
Group Suitable:
Yes
Industrial:
Pre-requisites:
Good FPGA design skills
Description:
We need HELP implementing the FPGA configuration for a custom designed and built FPGA board that is to be launched as part of UNSW's QB50 EC0 satellite.

To be undertaken together with Dr Ediz Cetin from EET.
Comments:
This is a chance to become involved in a high-profile project. Will suit engineer with time and commitment to spare in search of rewarding project. Will learn cutting edge FPGA design techniques such as dynamic partial reconfiguration and scrubbing.
Past Student Reports
  David BARTIMOTE in s1, 2012
Space-based applications for FPGA technology
 

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