Thesis Topic Details
Topic ID: |
3324 | |
Title: |
FPGA SEU mitigation through partial reconfiguration | |
Supervisor: |
Oliver Diessel | |
Research Area: |
Reconfigurable computing, Embedded Systems, Fault tolerance | |
| Associated Staff | ||
|---|---|---|
Assessor: |
Jorgen Peddersen | |
| Topic Details | ||
Status: |
Active | |
Type: |
R & D | |
Programs: |
CS CE SE | |
Group Suitable: |
Yes | |
Industrial: |
No | |
Pre-requisites: |
-- | |
Description: |
Look at dynamically reconfiguring FPGAs to eliminate errors. A place to start would be to implement a configuration "scrubbing" algorithm. This work could be combined with what we're already doing in the topic on Space-based applications for FPGA technology. | |
Comments: |
-- | |
| Past Student Reports | ||
| No Reports Available. Contact the supervisor for more information.
Check out all available reports in the CSE Thesis Report Library. NOTE: only current CSE students can login to view and select reports to download. |
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