Topic ID: |
3345 | |
Title: |
Hardware design for Power Anlaysis Attacks in Embedded Systems | |
Supervisor: |
Jude Angelo Ambrose | |
Research Area: |
Embedded Systems, Computer architecuture | |
| Associated Staff | ||
|---|---|---|
Assessor: |
Jorgen Peddersen | |
| Topic Details | ||
Status: |
Active | |
Type: |
R & D | |
Programs: |
CE | |
Group Suitable: |
No | |
Industrial: |
No | |
Pre-requisites: |
cs2121, computer architecture | |
Description: |
Power Analysis side channel attacks have been the most successful attacks on embedded systems such as smart cards and mobile phones. This project is a collaboration with the National University of Singapore. The candidate will be designing circuits in VHDL for cryptographic algorithms, such as AES, to prevent power analysis. Real power analysis will be measured and experimented, hence will provide an insight into the practical aspect of security. | |
Comments: |
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| Past Student Reports | ||
| No Reports Available. Contact the supervisor for more information.
Check out all available reports in the CSE Thesis Report Library. NOTE: only current CSE students can login to view and select reports to download. |
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