Thesis Topic Details

Topic ID:
3436
Title:
Designing Network-on-Chips for the ESLoC Platform
Supervisor:
Jude Angelo Ambrose
Research Area:
Computer architecuture, Embedded Systems, Hardware design
Associated Staff
Assessor:
Sri Parameswaran
Topic Details
Status:
Active
Type:
R & D
Programs:
CS CE
Group Suitable:
No
Industrial:
No
Pre-requisites:
cs2121, computer architecture
Description:
The candidate will be designing a Network-on-Chip for the ESLoC multiprocessor system-on-chip platform. NoC components such as serialisers, network interfaces and routers will be designed and developed as RTL. Performance evaluation and investigations for flow control will be part of the project.
Comments:
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Past Student Reports
  Daniel Thomas Somerville MURPHY in s2, 2013
Designing Network-on-Chips for the ESLoC Platform
 

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