| Assembler | Opcode | Semantics
| MOV Rd,Rr | 0010 11rd dddd rrrr | Rd = Rr
| ADD Rd,Rr | 0001 11rd dddd rrrr | Rd = Rd + Rr
| SUB Rd,Rr | 0001 10rd dddd rrrr | Rd = Rd - Rr
| AND Rd,Rr | 0010 00rd dddd rrrr | Rd = Rd & Rr
| OR Rd,Rr | 0010 10rd dddd rrrr | Rd = Rd | R
| EOR Rd,Rr | 0010 01rd dddd rrrr | Rd = Rd ^ Rr
| LSR Rd | 1001 010d dddd 0110 | Rd = Rd >> 1
| ASR Rd | 1001 010d dddd 0101 | Rd = (Rd & 0x80) | (Rd >> 1)
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| MULS Rd,Rr | 0000 0010 dddd rrrr | R0:R1 = Rd * Rr |