Assignment One: Comparing the Instruction Set Architectures of ARM and AVR

 

 

      In this assignment, you will learn by yourself the ISA of another RISC microprocessor ARM and compare it with that of AVR and write a report of approximately 4,000 words.

 

     You will work solo in Assignment 1.

  

     The deadline of Assignment 1 is 19 September, 2005. 

 

     Please follow the following guidelines when writing your report.

 

     As you know, an ISA consists of four components i.e. memory models, registers, data types and instructions. Therefore, you need to explore each component and present your comparison results in your report.  Specifically, your report should have the following sections.

 

1.      Introduction. In this section, you give an overview of ARM microprocessors. Your overview should focus on the salient features of ARM. Examples are pipelining architecture, conditional execution,   hardware support for power saving, caching and hardware support for floating point operations.

 

2.      Memory models. How many memory spaces are there in ARM? Is there a separate memory space for code?  Are registers mapped into a memory space like in AVR? What is the maximum memory size for each memory space?

 

3.      Registers. Give detailed descriptions of all registers here. As you know, AVR has two types of registers i.e. general registers and I/O registers. Does ARM also have the same types of registers? Pay special attention to the Current Program Status Register (CPSR).

 

a.       N, Z, C and V flags. Explain how ARM uses these flags for overflow, signed comparison and unsigned comparison.

 

b.      The least significant 5 bits are reserved for operating modes. What are they? How does each operating mode work? You need to give detailed descriptions for each operating mode.

 

c.       There is an interrupt enable/disable bit. This bit is used to enable/disable ARM interrupt system. Give detailed descriptions of ARM interrupt structure. How many hardware interrupts does an ARM microprocessor provide? Are they enough for all embedded systems? If not, what would you do as a designer of an ARM-based embedded system?

In addition to hardware interrupts, ARM provides software interrupt. What is the software interrupt used for?   

 

4.      Instruction Set. You don’t need to describe each instruction. Instead, you need to focus on the salient features of ARM instructions listed as follows.

 

a.       Describe the instruction structure including encoding scheme, the number of operands etc.

 

b.      Describe all addressing modes in ARM.

 

c.       ARM provides conditional execution of an instruction i.e. the operation given in an instruction is executed only if some condition holds.  Describe the conditional execution in details.

 

d.      Describe all the instructions for stack operations in ARM in details.

 

e.       ARM provides multiple-bit shift instructions.  Describe them in details. How multiple-bit shifts are implemented in hardware? 

 

f.        AVR provides special instructions in and out to access I/O registers (ports). Does ARM also provide in and out? If not, how do programmers access I/O ports in ARM?    

 

g.       AVR provide a special instruction sleep for power saving.  Does ARM also provide a similar instruction?

 

h.       AVR provides a watchdog timer to prevent software from corruption. The instruction wdr  is to reset the watchdog timer. Does ARM also provide a similar instruction?

 

5.      Data types.  Describe all data types in ARM in details. How would you implement in software the data types such as 64-bit signed and unsigned integers that are not supported by ARM? Give a software implementation of addition and subtraction and multiplication of two 64-bit signed and unsigned integers. 

 

6.      Conclusion. After comparing the ISA of ARM with that of AVR, now you should know what embedded systems need to use AVR and what embedded systems need to use ARM. Put your conclusions and reasons here.

 

 

References:      

1.      Steve Furber. ARM  System-on-Chip Architecture.

2.      http://www.arm.com.