Exceptions and Excepters

L4/MIPS exception handling

Totally analogous to page faults:

Each thread has an excepter
If a thread triggers an exception, the kernel invokes the thread's excepter by:
1. sending an IPC message to the pager on the faulter's behalf,
2. catching the pager's reply and continue the faulter.
The excepter may chose not to reply, leaving the excepting thread blocked forever.

Virtualisation of hardware:

A thread installs its own interrupt vector, using (kernel-emulated) processor features.

The kernel handles some exceptions internally (TLB miss, system call).

Gernot Heiser 2002-08-07