Advanced Operating Systems   COMP9242 2002/S2

UNSW

Printer-Friendly Version Administration                - Notices - Course Intro - Consultations # On-line Survey (closed) - Survey Results   Work - Lectures - Milestone 0 - Project Admin - Project Spec - Project FAQ - Exam   Documentation - ASysT Lab - L4 source browser - Sulima ISA Simulator - R4x00 ISA Summary  - MIPS R4700 Reference - MIPS R4000 User Manual  - Network Driver - GT64111   Related Info - Aurema OS Prize - OS Hall of Fame   History - 2000 - 1999 - 1998   Staff - Gernot Heiser (LiC)

Interrupts and Interrupt Handlers Each hardware interrupt is modelled as a virtual (hardware) thread. (At most) one user-level interrupt-handler thread is associated with each hardware interrupt. If an interrupt occurs, the kernel generates an IPC from the interrupt thread to the interrupt handler. The interrupt handler is in general (part of) a device driver. It will need access to device registers. This is done via a special mapping protocol of the root pager (covered later). The kernel handles some interrupts internally (timer interrupt).