Advanced Operating Systems   COMP9242 2002/S2

UNSW

Printer-Friendly Version Administration                - Notices - Course Intro - Consultations # On-line Survey (closed) - Survey Results   Work - Lectures - Milestone 0 - Project Admin - Project Spec - Project FAQ - Exam   Documentation - ASysT Lab - L4 source browser - Sulima ISA Simulator - R4x00 ISA Summary  - MIPS R4700 Reference - MIPS R4000 User Manual  - Network Driver - GT64111   Related Info - Aurema OS Prize - OS Hall of Fame   History - 2000 - 1999 - 1998   Staff - Gernot Heiser (LiC)

L4 device driver Runs at user level. Has mappings for device registers (MIPS) and physical memory. Typically consists of top half and bottom half. Top half handler processes device interrupts: receive L4 interrupt IPC, check success (status register), make data available (copying or mapping), initiate next request (if one), notify/reply to user (IPC). Bottom half handler processes user requests: initiate I/O (set up parameter buffer, write device registers) or queue request if device busy, reply to user (if asynchronous)