Devices (MIPS)

Are memory-mapped to addresses outside RAM range.
Device pages are mapped upon requesting a particular invalid page
with page address as second parameter.
Mapped writable and uncacheable to anyone requesting it at any time.
- Note: only tasks in $\sigma_0$ 's clan can IPC directly to $\sigma_0$ !
``Device'' mappings within RAM are used for DMA-able memory.
Present MIPS $\sigma_0$ does not check whether address really refers to a device.
Cacheability attribute is passed on when mapping to subtasks
- supports device drivers not directly in $\sigma_0$ 's clan.

Gernot Heiser 2002-08-07