[CSE]  Advanced Operating Systems 
 COMP9242 2002/S2 
UNSW

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Next: Cache Consistency Up: 10-smp Previous: Total Store Ordering

Partial store ordering


  • All stores go through write buffer.
  • Loads read from write buffer if possible.
  • Redundant stores are cancelled.
    • Breaks FIFO-order of stores!

load r1, counter // counter++;
add r1, r2, 1
store r2, counter
barrier
store zero, mutex // unlock(mutex);
  • Store to mutex can overtake store to counter.
  • Need to use memory barrier.
  • Failure to do so will introduce subtle bugs:
    • Changing process state after saving context.
    • Initiating I/O after setting up parameter buffer.
cc-wb



Gernot Heiser 2002-10-11