Nice to see all the positive feedback!
The (few) main gripes (especially USB stack, tutor consistency) are a subset of what came up in the LiC survey, see below for detailed response.
I'm somewhat surprised about the workload comment, I did discuss workload in the first lecture, and the course has an established reputation of "you either have a life or you do AOS", as is evident in all surveys.
Yes, documentation isn't the greatest, but that's life in systems. Compared to what you'll be faced with in the future, the documentation given was probably above-average...
Many thanks to all students for taking the time to answer the course survey, with more than half responding, results should be reasonably representative.
The results mostly speak for themselves. The course seems to be in good shape, overall satsifaction was very high. Especially the things we changed this year (requiring the use of git and de-coupling submission from demo) seem to have worked well and are appreciated by students, which is pleasing to see.
The main gripe was tutor consistency. This had been an issue in previous years as well, and we thought we had addressed it. However, going by how often this comment was made, it seems that things have got worse. From what I can tell, the main inconsistency was that some tutors would point out a bad design/implementation but let it go through if it satisfied the spec, while others insisted on fixing first, resulting in late penalties.
I think students were generally better served by the more picky tutors, as is indicated by the one student commenting about small things building up until they blow up.
There were also comments on some tutors being awesome/helpful, others not. With no names mentioned (which I would have blackened for the public version) it's a bit difficult to find out what's going on there, but I'll try to find out by talking to students individually. Next year I'll have a more explicit tutor question in the survey.
In any case, we'll take the tutor comments on board and will try to improve next time.
There were comments about some people having access to a USB stack which they used for bonus functionality, while others didn't.
I agree, this is a real fairness issue, and should not have happened. In fact, Kevin and I knew nothing about it until it was too late.
What apparently happened is that one student had insider connections to someone in our lab from whom the student obtained our experimental USB stack. There is nothing wrong about that, but its wrong if other students don't get the same opportunity, and that insider person should have known that.
We sincerely apologise for this, and will ensure that something similar won't be repeated.
Why did only Kev record his lectures? Not actually quite true, I started recording from the virtualisation lecture (and that recording is up on the lectures page). I did record later ones as well (microkernel design and real-time), but managed to stuff up both times, and was left with only 1h or recording each time. Apologies for my clumsiness!
The main takeaway here is that students appreciate having the recordings, so I'm motivated doing it again next time (hopefully a bit more successfully!) I'll also encourage the guest lecturers to do the same.
Thanks for the feedback, and your participation in the course!