Objective

• How can the software designer abstract over the various instantiations of a particular architectural feature across the range of available architectures, and what software designs will support portability?
• What implications do architectural decisions have on program performance and what techniques may be used to obtain maximum performance from a particular processor family?
• How likely is a particular approach to be tied to a particular processor family, or to a particular processor model within a family?
• What architectural features are available but have not been properly exploited to date? How could they be used?
• How are issues like data layout, locks, low-level parallelism, context switching rates, probability of taking if vs. else branches, working sets, etc., affect performance or power consumption on a specific architecture?
• What are the likely developments in the next few years? For example, will caches grow at all levels or will there be more levels? Will associativity increase or decrease?

Specific topics covered

Instruction set architecture:

RISC vs CISC, VLIW, ILP, addressing modes, synchronisation primitives, pipelining, issue slots, load and branch penalties, delay slots, out-of-order execution, EPIC, SIMD instructions, predication, status flags

Cache memory architecture:

virtual/physical, split/unified, associativity, latency, coherency, write buffers, store order...; software cache management (colouring)

MMU design:

page sizes, TLB size and associativity, split/unified TLBs, TLB tagging, segmentation, support for sharing, hardware vs software reload, multi-level TLBs, pinning of entries; software algorithms and data structures (e.g., TLB caches)

Multiprocessors and interconnection architecture:

SMP, NUMA, single-chip multiprocessors, symmetric multithreading; inter-processor communication mechanisms and latencies

Structure

1. advanced architecture concepts, and their effects on software;
2. advanced architecture implementations, i.e. case studies of modern commercial processor architectures and how they deal with the issues discussed in the first part.

After their seminar, each student has a week to complete a report on the topic area. Students are strongly encouraged to have a complete draft of the report ready for their seminar, and use the feedback from their peers (and lecturer) for improving the report before submitting it.

Meeting times will be as agreed by the participants and will be published on the course web site. The seminar schedule will be determined in the first meeting, and may change during the session due to the LiC's travels. During non-seminar weeks, the weekly meeting time will be used to discuss archtecture issues etc.

Assessment

Key assessment criteria will be the quality of the (oral and written) presentation and, in particular, the depth and degree of insight demonstrated in the seminar(s) and the report. An important consideration for the seminar is how much the presenter's peers will have learnt. Seminars will be assessed by the LiC, with advise/feedback from the students in the course. That feedback will be in the form of a discussion after the seminar, plus an anonymous poll of students (other than the presenter) as to the deserved mark. The presenter will be told the LiC's mark as well as the average of the peer assessment. The latter has no bearing on the final mark, but is to provide feedback to the presenter.

Penalty for late reports is one mark lost per day late (seven marks per week).

Plagiarism

Literature

John L. Hennessy and David A. Patterson: Computer Architecture, a Quantitative Approach. Morgan Kaufmann Publishers, 3^rd edition, 2003.

Information relevant to the second part is only partially available from the book (note that there are additional appendices available in electronic form) but will require students to locate and study architecture manuals available on the web.

Staffing

No other personnel involved.

Administrativa

Prerequisites: COMP3211 or COMP9211, COMP3231 or COMP9201, or equivalent knowledge. Excluded COMP4211. There are no follow-on courses.

The course weight is 6UoC. There is no parallel offering.

There will be a on-line survey at the end, the results of which will be published and will be taken into account for future offerings.

For further info on school policies relating to plagiarism, special consideration, expectations and responsibilities of students, OH&S, and equity and diversity issues consult the yellow form.