-
While Mach permits sending a notification message to another task if an
exception happens (via a thread/task exception port), L4 exception
handling is done in the task itself.
This is actually a case where L4 implementations differ. On the MIPS a
thread has an exception handler, just as it has a page-fault handler.
[00-11-24]
-
The number of threads per task is very limited in L4.
Yes, but noting is stopping you from using several L4 tasks to
represent a user task. The Mungi implementation does that.
Also, the fixed task/thread breakdown will change in a future
version. In the same revision clans and chiefs will vanish and be
replaced by a more flexible mechanism.
[00-11-24]
-
It seems that L4 does not provide any information on the CPU time
consumed by a particular thread.
Have a look at the thread_schedule syscall. It returns accumulated CPU
time.
[00-11-24]
-
How do you schedule/synchronise/suspend/resume threads?
There are several way to do this, depending on what you want to
achieve.
- While a thread can be activated via lthread_ex_regs(),
a thread cannot be brought back to the initial inactive state (as long
as the task lives). However, lthread_ex_regs() can be used to
set the IP and SP such that the thread blocks itself (receive from an
invalid thread with an infinite timeout). Such a thread can only be made
runnable again via another lthread_ex_regs() call.
- A thread can be given zero priority or a zero time slice by a
scheduler (i.e., a thread whose MCP is high enough). Such a thread
can then only execute via time-slice donation. A time slice can be
donated explicitly (via a thread_switch() syscall) or
implicitly via IPC (when a thread sends a message to a waiting
thread, the latter executes on the sender's time slice.)
- Synchronisation always happens during IPC. As L4 IPC is
blocking, any successful IPC operation implies a rendez-vous between
sender and receiver.
[00-11-24]
-
Would it be safe to assume that a multiprocessor L4 multiplexes threads
to the available processors transparently?
No. The principle of separation of policy and mechanisms
requires that the kernel is free of policies (such as load
balancing).
It's also required for efficiency. Running a thread on the "wrong"
processor is costly (cache coherency) and migrating is expensive
(cold caches).
[00-11-15 - gernot]