Hui Guo received the Bachelor and Masters degrees in Electrical and Electronic Engineering from Anhui University in China and PhD in Electrical and Computer Engineering from the University of Queensland in Australia. Prior to joining the University of New South Wales to start her academic career, she had worked in several companies/organizations in Canada, for large information and e-commerce systems development.

She is now a senior lecturer in the School of Computer Science and Engineering at the University of New South Wales. She is a member of IEEE and has serviced as the TCP member for a number of international conferences.

Contact:

Dr. Hui Guo

Room 501F, Level 5, K-17

School of Computer Science and Engineering

UNSW, NSW 2052, Australia

Phone: +61 2 9385 7136

Email: huig@cse.unsw.edu.au

Research Interests:

• Computer Hardware
• Arithmetic and Logic Structures
• Memory Systems
• Processor Architecture
• Ubiquitous Computing
• Power/Energy Reduction
• System Architecture
• Security Design

Research Fundings:

• Sri Parameswaran, Hui Guo, A. Ignjatovic, Design of Highly Secure Embedded Systems Using Modern Architecture Processors, 2007 UNSW Goldstar Award
• Hui Guo, An Approach to Enhance Performance of Multi-Pipe Application Specific Instruction-Set Processor Systems with Large Memory, Faculty Research Grant (FRG), 2007
• A. Ignjatovic, H. Guo, et al. Computer Simulations, Research Infrastructure Block Grant (RIBG), 2005
• Hui Guo, System Level Pipelining and Applications, Faculty Research Grant Program (FRG), 2005
• Hui Guo, Sri Parameswaran, Embedded Systems, Research Infrastructure Block Grant (RIBG), 2003

Publications:

Journal

• Sajid Hussain, Hui Guo, Tuo Li, Hassaan Saadat, Sri Parameswaran, “COPS: A Complete Oblivious Processing System’’, Microprocessors and Microsystems, 2021

• Hui Yan, Xiaomin Zhu, Huangke Chen, Hui Guo, Wen Zhou, Weidong Bao, “DEFT: Dynamic Fault-Tolerant Elastic Scheduling for Tasks with Uncertain Runtime in Cloud”, Information Sciences, 2018
• Mahanama Wickramasinghe and Hui Guo, “A low-Energy Multi-threaded Processor Design for Application Specific Embedded Systems”, International Journal of Computer & Software Engineering, 3:131, 2018
• Mubashir Hussain; Hui Guo; Sri Parameswaran, “A Customized Authentication Design for Traffic Hijacking Detection on Hardware-Trojan Infected NoCs”, Journal of Computer and Communications, 2018, 6, 135-152.
• Guipeng Liu; Xiaomin Zhu; Ji Wang; Deke Guo; Weidong Bao; Hui Guo, “SP-Partitioner: A Novel Partition Method to Handle Intermediate Data Skew in Spark Streaming”, Future Generation Computer Systems, 2017
• Tao Liu, Hui Guo, Sri Parameswaran, X. Sharon Hu, “iCETD: An Improved Tag Generation Design for Memory Data Authentication in Embedded Processor Systems”, Integration, the VLSI Journal, 2017
• Xiaomin Zhu, Ji Wang, Hui Guo, Dakai Zhu, Laurence T. Yang, and Ling Liu, “Fault-Tolerant Scheduling for Real-Time Scientific Workflows with Elastic Resource Provisioning in Virtualized Clouds”, Transactions on Parallel and Distributed Systems, 2016
• Huangke Chen, Xiaomin Zhu, Hui Guo, Jianghan Zhu, Xiao Qin, Jianghong Wu,  “Towards Energy-Efficient Scheduling for Real-Time Tasks under Uncertain Cloud Computing Environment," Journal of Systems and Software, Volume 99, 2015,
• Ji Gu, Hui Guo, and Tohru Ishihara, “DLIC: Decoded Loop Instructions Caching for Energy-Aware Embedded Processors,” ACM Transactions on Embedded Computing Systems, Vol. 13 Issue 1, Article 6, 2013
• Ji Gu and Hui Guo, “Reducing Power and Energy Overhead in Instruction Prefetching for Embedded Processor Systems,” International Journal of Handheld Computing Research, 2(4), 2011
• Ran Zhang, Hui Guo, and Shivam Garg, “Register File Customization for Embedded Multi-Threaded Processors,”  International Journal of Computer Theory and Engineering (IJCTE), Vol.5, No. 3, June, 2013

• Chuan He, Xiaomin Zhu, Hui Guo, and Jianqing Jiang, “Rolling-Horizon Scheduling for Energy Constrained Distributed Real-Time Embedded Systems,”  Journal of Systems and Software, volume 84, issue 4, 2012
• Ji Gu, Hui Guo, and Patrick Lee, “An On-Chip Instruction Cache Design with One-bit Tag for Low Power Embedded Systems,” Microprocessors and Microsystems, 35, 2011
• Hui Guo, and Sri Parameswaran, “Shifted Gray Encoding to Reduce Instruction Memory Address Bus Switching for Low Power Embedded Systems,” Journal of Systems Architecture, Volume 56, Issues 4-6, 2010
• D. Zhang, M. Fu, H. Guo and B. Luo, “Automatic estimation algorithm of component number of mixture model based on penalized distance,” Journal of South China University of Technology (Natural Science), v 37, 2009
• Ji Gu, and Hui Guo, “An Efficient Segmental Bus-Invert Coding Method for Instruction Memory Data Bus Switching Reduction,” EURASIP Journal on Embedded Systems, vol. 2009
• Mei Hong, and Hui Guo, “Security Design for Networked Multi-Service Smart Card Systems with High Performance,” International Journal of Security and Its Applications, vol. 3, No. 1, 2009
• Swarnalatha Radhakrishnan, Hui Guo, Sri Parameswaran, and Aleksandar Ignjatovic, “HMP-ASIPs: Heterogeneous Multi-Pipeline Application Specific Instruction-set Processors,” IET Computers & Digital Techniques, 2009

Conference

• Shiyi Yang, Peilun Wu and Hui Guo, “DualNet: Locate Then Detect Effective Payload with Deep Attention Network”, IEEE DSC 2021
• Peilun Wu, Nour Moustafa, Shiyi Yang, Hui Guo, “Densely Connected Residual Network for Attack Recognition”, IEEE TrustCom 2020 
• Peilun Wu, Hui Guo and Nour Moustafa, “Pelican: A Deep Residual Network for Network Intrusion Detection”, IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, 2020.
• Peilun Wu and Hui Guo, “LuNet: A Deep Neural Network for Network Intrusion Detection”, SSCI 2019.
• Peilun Wu, Hui Guo and Richard Buckland, “A Transfer Learning Approach for Network Intrusion Detection”, ICBDA 2019.
• Sajid Hussain and Hui Guo, “A Low Performance-Overhead ORAM Design for Processor System with Un-Trusted Off-chip Memory”, AUTEEE, 2019.
• Sajid Hussain and Hui Guo, “A Low Performance-Overhead ORAM Design for Processor System with Un-Trusted Off-chip Memory”, ICCSIE 2018
• Mubashir Hussain, Amin Malekpour, Hui Guo and Sri Parameswaran, “EETD: An Energy Efficient Design for Runtime Hardwar Trojan Detection in Untrusted Network-on-Chip”, ISVLSI2018
• Mubashir Hussain and Hui Guo, “Packet Leak Detection on Hardware-Trojan Infected NoCs for MPSoC Systems”, 2017 International Conference on Cryptography, Security and Privacy (ICCSP 2017)
• Mahanama Wickramasinghe and Hui Guo, “Data-Space Relocation to Improve Data Cache Performance for Embedded Multi-Threaded Processor Systems”,  The 5th International Conference on Network, Communication and Computing (ICNCC 2016)
• Huangke Chen, Xiaomin Zhu , Hui Guo, “EONS: Minimizing Energy Consumption for Executing Real-Time Workflows in Virtualized Cloud Data Centers”, SRMPDS 2016.
• Tao liu, Hui Guo, Sri Parameswaran, and X. Sharon Hu, “Improving Tag Generation for Memory Data Authentication in Embedded Processor”, ASPDAC’2016, Jan. 2016
• Mahanama Wickramasinghe and Hui Guo, “Effective Hardware-Level Thread Synchronization for High Performance and Power Efficiency in Application Specific Multi-Threaded Embedded Processors”, ICCD 2015
• Tao Liu, and Hui Guo, “Dynamic Key Design and Its Security Evaluation for Memory Data Protection in Embedded Processor Systems,” International Conference on IT Convergence and Security, 2014,
• Mahanama Wickramasinghe and Hui Guo “Energy-Aware Thread Scheduling for Embedded Multi-Threaded Processors: Architectural Level Design and Implementation,” ISVLSI 2014
• Ran Zhang and Hui Guo, “Evaluation of Multi-Threaded Processor Designs for Energy Efficient Embedded Systems,” The 10th IEEE International Conference on Embedded Software and Systems (ICESS 2013).
• Mei Hong, Hui Guo, and Sri Parameswaran, “Dynamic Encryption Key Design and Management for Memory Data Encryption in Embedded Systems,” ISVLSI, 2013
• Ran Zhang, Hui Guo, and Shivam Garg, “Register File Customization for Energy-Aware Multi-Threading Embedded Processor Systems,” ICCSIT 2012.  The 5th International Conference on Computer Science and Information Technology.
• Mei Hong, Hui Guo, and Sharon X. Hu, “A Cost-Effective Tag Design for Memory Data Authentication in Embedded Systems,” CASES 2012
• Ji Gu and Hui Guo, “Enabling Large Decoded Loop Instruction Caching for Energy-Aware Embedded Processors,” CASES 2010
• Mei Hong and Hui Guo, “FEDTIC: A Security Design for Embedded Systems with Insecure External Memory,” Future Generation Information Technology, Lecture Notes in Computer Science, 2010, vol 6485/2010.
• Hui Guo, “A Structural Customization Approach for Low Power Embedded Systems Design,” IEEE/ACM International Conference on Green Computing and Communications, 2010
• Ji Gu and Hui Guo, “An Energy Efficient Instruction Prefetching Scheme for Embedded Processors,” The 2010 International Conference on Ubiquitous Computing and Multimedia Applications, 2010
• Mei Hong and Hui Guo, “FEDTIC: A Security Design for Embedded Systems with Insecure External Memory,” The 2010 International Conference on Ubiquitous Computing and Multimedia Applications, 2010.
• Ji Gu, Hui Guo and Patrick Lee, “ROBTIC: An On-Chip Instruction Cache Design for Low Power Embedded Systems,” The 15th IEEE International Conference on Embedded and Real-Time Computing Systems and  Applications (RTCSA 2009), 2009
• Aleksandar Ignjatovic, Chung Tong Lee, Cat Kutay, Hui Guo, and Paul Compton, “Computing Marks from Multiple Assessors Using Adaptive Averaging,” International Conference on Engineering Education, 2009
• Yu Zhou, Hui Guo and Ji Gu, “Register File Customization for Low Power Embedded Processors,” The 2nd IEEE International Conference on Computer Science and Information Technology (IEEE ICCSIT 2009)
• Ji Gu, and Hui Guo, “A Segmental Bus-Invert Encoding for Instruction Data Bus Switching Reduction,” The 2009 International Symposium of Circuits and Systems, 2009 (ISCAS  2009)
• Mei Hong, Hui Guo and Bin Luo, “Security Design for Networked Multi-Service Smart Card Systems,” The Second International Conference on Future Generation Communication and Networking (FGCN 2008), 2008
• Yu Zhou, Hui Guo, “Application Specific Low Power ALU Design,” The 2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), 2008
• Hui Guo, “Application Specific Gray Code Encoding for Instruction Memory Address Bus Switching Reduction,” In proceedings of VLSI-SoC, 2008, Oct 13-15, Greece.
• Daming Chang, Hui Guo, Bin Luo, “An Algorithm for Estimating Number of Components of Gaussian Mixture Model Based on Penalized Distance,” IEEE International Conference on Neural Networks & Signal Processing (ICNNSP’08), June 7-11, 2008, ZhengJiang, China
• Bin Luo, Wei Gu, Hui Guo, “A VQ Digital Watermark Algorithm Based On t-mixture Models Segmentation”, IEEE International Conference on Neural Networks & Signal Processing (ICNNSP’08), June 7-11, 2008, ZhengJiang, China
• Swarnalatha Radhakrishnan, Hui Guo, Sri Parameswaran, Aleksandar Ignjatovic. “Application Specific Forwarding Network and Instruction Encoding for Multi-pipe ASIPs”. In proceedings of CODES+ISSS’04, 2006
• Swarnalatha Radhakrishnan, Hui Guo, Sri Parameswaran. “Customization of Application Specific Heterogeneous Mult-Pipeline Processors”. DATE 2006.
• Swarnalatha Radhakrishnan, Hui Guo, Sri Parameswaran. “n-pipe: Application Specific Heterogeneous Mult-Pipeline Processor Design”. The Workshop on Application Specific Processors, Sept. 2005
• Hui Guo; Sri Parameswaran. “Balancing System Level Pipelines with Stage Voltage Scaling”. In Proceedings of IEEE Symposium on VLSI (ISVLSI), May 2005.
• Swarnalatha Radhakrishnan, Hui Guo, Sri Parameswaran. “Dual-pipeline heterogeneous ASIP Design”. In proceedings of CODES+ISSS’04, Sept. 2004
• Hui Guo, Sri Paramewaran. “Unrolling loops with indeterminate loop counts in system level pipelines”. Design Automation Conference 1998. Proceedings of the ASP-DAC '98. Asia and South Pacific ,1998
• Sri Parameswaran, Hui Guo; “Power reduction in pipelines”, ASP-DAC 1998.
• Sri Parameswaran, Hui Guo. “Power consumption in CMOS combinational logic blocks at high frequencies”. ASP-DAC, 1997.
• Sri Parameswaran, Hui Guo.  “Partitioning of System Level Pipelines”. The 14th Australia Microelectronics Conference (MICRO’97), Oct. 1997.
• Hui Guo, Sri Parameswaran.  “Unfolding Loops with Indeterminate Count in System Level Pipelines”. The 14th Australia Microelectronics Conference (MICRO’97), Oct. 1997. Page(s): 82-87
• Sri Parameswaran, Hui Guo. “Extracting Higher Performance/Power in Combinational CMOS Circuits”. PATMOS’96 Sixth International Workshop, 1996.
• Hui Guo, Sri Paramewaran. “System Level Pipelining”, Asia Pacific Conference on Hardware Description Languages (APCHDL) Conference, 1996.

Teaching Areas:

• Computer Architectures, COMP3211
• Digital System Structures, COMP9022
• Microprocessors and Interfacing, COMP9032
• Digital Circuits and Systems, COMP3222