PhD candidate Computer
Science & Engineering University of New South Wales
liangt@cse.unsw.edu.au
About Me
An expert on multi-mode and low power communication ASIC design with extensive experience in VLSI, wireless communication, signal processing and high level synthesis industries. More than 10 years of professional experience working on the design of Bluetooth, Wireless LAN (802.11 a/b/g/n/ac), UWB baseband chips and the research of Software Defined Radio baseband architectures. Comprehensive knowledge of baseband microarchitecture, hardware/software partitioning, microprocessor, memory/cache system and ASIP. Expertise in Verilog/VHDL RTL design, ASIC chip area/throughput/power optimization.
General Information
School of Computer Science & Engineering Building K-17 501(05)
University of New South Wales Sydney, NSW, Australia 2052
Software Defined Radio: reconfigurable communication baseband for multiple standards.
Low power ASIC design: low static power, low toggle ASIC design, especially for communication MAC/PHY layer circuits.
High performance processor design for mobile application: Low power consumption, high performace processor with special instructions and novel processor interfaces for communication baseband.
Hybird FPGA core into ASICs: hybird flexible size FPGA core into ASICs, targeting to a general partial reconfigurable methodology with high performance from ASIC.
Publication:
Liang Tang, Jorgen Peddersen and Sri Parameswaran. A Rapid Methodology for Multimode Communication Circuit Generation. 25th International Conference on VLSI Design (VLSI Design 2012)(pdf)
Liang Tang, Jude Angelo Ambrose and Sri Parameswaran. MAPro: A Tiny Processor for Reconfigurable Baseband Modulation Mapping. 26th International Conference on VLSI Design (VLSI Design 2013, Best paper award)(pdf)
Liang Tang, Jude Angelo Ambrose and Sri Parameswaran. Reconfigurable Pipelined Coprocessor for Multi-mode Communication Application. UNSW-Technical Report 2012-22(pdf)
Liang Tang, Jude Angelo Ambrose and Sri Parameswaran. Variable Increment Step based Reconfigurable Interleaver for Multimode Communication Application. IEEE International Symposium on Circuits and Systems (ISCAS 2013)(pdf)
Liang Tang, Jude Angelo Ambrose and Sri Parameswaran. Reconfigurable Pipelined Coprocessor for Multi-mode Communication Transmission. Design Automation Conference (DAC 2013)(pdf)
Teaching:
COMP3601: Design project A (lab demonstrator)
COMP4601: Design project B (lab demonstrator)
COMP2121/9032: Microprocessors and Interfacing (lab demonstrator)
Working Experience: Broadcom Sydney Pty. Ltd.
Period 1: Dec 2010 to Jun 2011
Period 2: Mar 2012 to Sep 2012
Title: Intern
Responsibility: Wireless LAN ASIC verification
Broadcom Sydney Pty. Ltd.
Wipro Techno Centre Singapore Pte. Ltd.
OKI Techno Centre Singapore Pte. Ltd.
Huawei Technologies Co., Ltd.
