University of New South Wales, Sydney, Australia  corg image

 

 

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Peng Di

Research Associate

Supervisor:   Prof. Jingling Xue
   
Compiler Research Group (CORG) 
Programming Languages and Compilers Group
School of Computer Science and Engineering
University of New South Wales
Sydney, NSW 2052, Australia
 
Phone: (+61 2) 9385 4941
E-mail: pengd at cse dot unsw dot edu dot au


About Me:

    I am a postdoctoral researcher working with Professor Jingling Xue at School of Computer Science and Engineering, The University of New South Wales.


Education:

  • 2009 - 2013       University of New South Wales (Ph.D.)
  • 2005 - 2009       University of Science and Technology Beijing (Combined M.Sc.-Ph.D.)
  • 2000 - 2004       Xian Jiaotong University (B.E.)


Research Interests:  

  • Program Analysis: Flow-Sensitivity, Context-Sensitivity, Field-Sensitivity. More efficient, scalable and precise alias analysis algorithms for bug detection on multi-threaded practical problems.
  • Compilation Techniques for Heterogeneous Systems: High-level programming language design and implementation for heterogeneous systems. Compiler optimizations for lower-lever native heterogeneous languages such as CUDA, OpenCL. Automatic parallelization and performance optimization for heterogeneous systems.
  • Parallel Programming & Optimisation: Fine-grained parallel algorithm for iterative algorithms, GPGPU and CUDA optimization, MPI process optimizing mapping for hierarchical multi-core clusters.


Publications:

  Conference Papers:

  • Yulei Sui, Peng Di, Ding Ye, Hua Yan and Jingling Xue. SVF: Static Value-Flow Analysis in LLVM. In the 2016 European LLVM Conference (EuroLLVM '16), Barcelona, Spain, 2016.
  • Peng Di and Yulei Sui. Accelerating Dynamic Data Race Detection Using Static Thread Interference Analysis. In 7th International Workshop on Programming Models and Applications for Multicores and Manycores co-located with the PPoPP 2016(PMAM '16), Barcelona, Spain, 2016.
  • Yulei Sui, Peng Di and Jingling Xue. Sparse Flow-Sensitive Pointer Analysis for Multithreaded C Programs. In the 2016 International Symposium on Code Generation and Optimization (CGO '16), Barcelona, Spain, 2016.Artifacts
  • Peng Di, Yulei Sui, Ding Ye and Jingling Xue. Region-Based May-Happen-in-Parallel Analysis for C Programs. In the 2015 International Conference on Parallel Processing (ICPP '15), Beijing, China, 2015.
  • Peng Di, Ding Ye, Yu Su, Yulei Sui and Jingling Xue. Automatic Parallelization of Tiled Loop Nests with Enhanced Fine-Grained Parallelism on GPUs. In the 2012 International Conference on Parallel Processing (ICPP '12), Pittsburgh, USA, 2012.
  • Jilin Zhang, Liting Zhu, Jie Mao, Jian Wan and Peng Di. An Efficient Parallel Implementation for Three-dimensional Incompressible Pipe Flow based on SIMPLE. In the 12th IEEE/ACM International Symposium on Cluster, Cloud, and Grid Computing (CCGrid '12), pages 660-667, Ottawa, Canada, 2012.
  • Peng Di and Jingling Xue. Model-Driven Tile Size Selection for DOACROSS Loops on GPUs. In the 17th International European Conference on Parallel and Distributed Computing (Euro-Par '11), pages 401-412, Bordeaux, France, 2011.
  • Peng Di, Qing Wan, Xuemeng Zhang, Hui Wu and Jingling Xue. Toward Harnessing DOACROSS Parallelism for Multi-GPGPUs. In the 2010 International Conference on Parallel Processing (ICPP '10), pages 40-50, San Diego, USA, 2010.
  • Peng Di, Jingling Xue, Changjun Hu and Jingjing Zhou. A Cache-Effcient Parallel Gauss-Seidel Solver with Alternating Tiling. In the 15th International Conference on Parallel and Distributed Systems (ICPADS '09), pages 244-251, Shenzhen, China, 2009.
  Journal Papers:

  • Jilin Zhang, Junfeng Yuan, Jian Wan, Peng Di. Efficient Parallel Implementation of Incompressible Pipe Flow Algorithm Based on SIMPLE. Concurrency and Computation: Practice and Experience, 2013.
  • Peng Di, Hui Wu, Jingling Xue, Feng Wang and Canqun Yang. Parallelizing SOR for GPGPUs Using Alternate Loop Tiling. Parallel Computing, volume 38, issues 6-7, pages 310-328, June-July 2012.
  Thesis:

  • Peng Di, Automatic Parallelization of Tiled Stencil Loop Nests on GPUs. Ph.D. Thesis, 2013.


Journal Link:


Professional Activities:

Program Committee for:

  • HPDIC 2012 - 2015 (in conjunction with IEEE IPDPS.)
  • FM-S&C 2011 (in conjunction with IEEE ICWS 2011, SCC2011, CLOUD 2011, and SERVICES 2011.)

Conference Reviewer for:

  • CASES
  • CC
  • CCGrid
  • CGO
  • DATE
  • ICPP
  • IPDPS
  • LCTES
  • PPoPP

Journal Reviewer for:

 
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Last Update: Sep. 10, 2013