Abstract

This workshop and discussion forum aims to provide a detailed introduction to GPU computing with CUDA and NVIDIA Tesla computing solutions.

CUDA is NVIDIA's revolutionary parallel computing architecture that is built up on a unified Computing architecture and multiple software components. The architecture consists of an ISA and hardware compute engine. The available software tools include a C compiler and NVIDIA drivers for developers to build applications using C for CUDA, as well as useful libraries for high-performance computing (BLAS, FFT, etc.).

This half-day workshop will provide an introduction to the CUDA architecture, programming model, and the programming environment of C for CUDA, as well as an overview of the Tesla GPU architecture, a live programming demo, and strategies for optimizing CUDA applications for the GPU. The workshop will also include a brief presentation of some of the projects using CUDA within the School of Computer Science and Engineering, UNSW, and of the hardware requirements for getting started with CUDA.

Speakers

  • Mark Harris (NVIDIA)
    Mark Harris is a Senior Developer Technology Engineer at NVIDIA, where he works with developers around the world on software for computer graphics and high-performance computing. His research interests include parallel algorithms, general-purpose computation on GPUs, physically based simulation, real-time rendering, and gastronomy. Mark earned his Ph.D. in computer science from the University of North Carolina at Chapel Hill in 2003 and his B.S. from the University of Notre Dame in 1998. Mark founded and maintains GPGPU.org , a web site dedicated to general-purpose computation on GPUs. Mark has recently moved to Brisbane after living in the United Kingdom for five years.
  • Manuel Chakravarty (School of Computer Science and Engineering, UNSW)
    Manuel M T Chakravarty is an Associate Professor at the School of Computer Science & Engineering of the University of New South Wales, Sydney. He graduated from the University of Karlsruhe, Germany, in 1991 and received a doctoral degree (Dr. rer. nat.) from the Technical University of Berlin in 1997. Before he moved to Sydney in 2000, he was an assistant professor at the University of Tsukuba, Japan, for three years. Between 2003 and 2005, he held a fractional appointment as a Senior Researcher at the National ICT Australia.
    His main research interest is in functional programming languages, novel compiler technology, and parallel programming. His contributions include the design and implementation of Haskell type families, nested data parallelism, and foreign language interfaces. He is generally interested in programming languages, type systems, compilers, novel computer architectures, and software safety & security. He receives his inspiration from combining theory with practice.
  • Dragan Dimitrovici (Xenon Systems)
    Dragan Dimitrovici is the Founder and driving force of the XENON Technology Group. He founded the company in 1996 at the age of 21, when he recognised the opportunity to sell quality locally assembled computer hardware.
    The XENON Technology Group (XTG) which consists of XENON Systems, Mediaproxy and XDT develops mission critical solutions for new and emerging markets within the Defence, Scientific Research, Broadcast, Film and Education industry. Its solutions are tailored to individual customer requirements. Each year XTG invest heavily in research and partners with world-class IT vendors including, NVIDIA, Intel, AMD, Mellanox, Xyratex, Adaptec, AccelerEyes (Jacket for Matlab) & Microsoft.
    Dragan studied Information Management at Melbourne University and is a certified Intel Server Integration Specialist. In 2006, Dragan was an Ernst & Young, Entrepreneur of the Year finalist.
    Dragan has direct responsibility for the product development and strategy of the company.

Program

08:45 - 09:00Registration
09:00 - 10:50 [SLIDES] Introduction to NVIDIA CUDA and Tesla (Mark Harris)
[SLIDES] General Purpose GPU Computing at Programming Languages & Systems, UNSW (Manuel Chakravarty)
[SLIDES] CUDA Parallel Programming Model and C for CUDA (Mark Harris)
Live Programming Demo Part 1 (Mark Harris)
10:50 - 11:10 Tea Break
11:10 - 13:00 Live Programming Demo Part 2 (Mark Harris)
[SLIDES] CUDA Toolkit and Libraries (Mark Harris)
[SLIDES (full)] [SLIDES (short)] Optimizing Performance (Mark Harris)
[SLIDES] CUDA Directions (Mark Harris)
[Education Promotion Handout] Getting Started - CUDA enabled Hardware Options (Dragan Dimitrovici)
General Q&A
13:00 - 14:00 Light Lunch and Discussion

Registration

You can register for the workshop by sending an email to Sean Lee <seanl@cse.unsw.edu.au>.
The registration is free, but mandatory for catering purposes.
The number of seats are limited to 50.

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