Effects of architecture level fault injection in embedded processors
Reliability is becoming an essential part in embedded processor design due to the fact that they are used in safety critical applications and they need to deal with sensitive information. The first phase in the design of reliable embedded systems involves the identification of faults that could be manipulated into a reliability problem. A technique that is widely used for this identification process is called fault injection and analysis. The aim of this project is to develop a fault injection and detection engine at the hardware level for an embedded processor. Expected outcomes are to develop a framework for:
· injecting faults into instruction and data memory streams of an embedded processor;
· analyzing the fault propagation rate at different part of the data path of the processor; and,
· evaluating the percentage of effects from errors in different type of instructions in embedded applications.
A hardware implementation of Micro Embedded Monitoring for reliability and security in embedded processors.
As embedded systems engage various parts of our lives they are required to deal with sensitive information and execute safety critical applications. Micro Embedded Monitoring (MEM) is a framework for embedding reliability and security monitoring within the microinstructions of the machine instructions forming self-monitoring instructions. This method could be used as a general framework to accommodate any inline monitoring technique that is used to monitor the safe and reliable execution of a program. The project will involve hardware implementation of this framework to evaluate the real execution time and energy overhead due to MEM considering memory latencies and other hardware delays.