h_main_UcE9_11d70000771f2f75.jpgTuo Li

PhD Candidate

Supervised by Prof. Sri Parameswaran

Embedded System Laboratory

Room 510(A), 5th Floor, BLDG K-17

School of Computer Science and Engineering

Faculty of Engineering

University of New South Wales

Sydney 2052 Australia

 

Contact

Tel.: +61 02 938 57204 (office)

Email: 

 

Research

Research Interests: Application Specific Instruction-Set Processors (ASIPs), Soft Error Resiliency.

 

PhD Dissertation: cost-efficient soft-error resiliency for ASIP-based embedded systems.

 

Dependable Embedded Systems (collaboration): with Chair for Embedded Systems, Karlsruhe Institute of Technology, under SPP 1500, a priority program as part of German Research Foundation (DFG).

 

UNSW ARGUS Tool (partial contributor): automatic generation of heterogeneous MPSoC HW/SW platform from GUI-supported frontend. The frontend supports: 1) Making basic configuration by clicking, dragging and connecting necessary components; 2) Adding custom hardware components in the same fashion; 3) Grouping components to create new composite components. The backend (based on the Xilinx tool chain) automatically synthesizes and maps the hardware to the regarding FPGA board. ARGUS currently supports PISA (similar to MIPS), LEON2 (SPARC-v8 compatible) and Microblaze processors, together with custom components and standard IPs provided by Xilinx library. The prototype version of ARGUS tool is already completed, and further enhancement is under development. A demonstration about ARGUS was given in 50th DAC ACM SIGDA University Booth.

 

Short Bio

Tuo Li received B.Eng. in Electronic Science & Technology in Hefei University of Technology (Hefei, China, 2004 - 2008). He had studied for a year in Shanghai Jiao Tong University (Shanghai, China, 2008 - 2009), before he decided to explore a bit further and experience some oceanic life. He started the pursuit of Ph.D. in Computer Science & Engineering in University of New South Wales (Australia, 2009 - present), with a belief in cooking good chips without bad fishes.

 

Peer-Reviewed Publications [First Author, Conference & Workshop]

1.     DHASER: Dynamic Heterogeneous Adaptation for Soft-Error Resiliency in ASIP-based Multi-core Systems

        Tuo Li, Mahammad Shafique, Semeen Rehman, Jude Angelo Ambrose, Jörg Henkel, Sri  Parameswaran

        ICCAD 2013, San Jose, USA. Acceptance Rate: 26% (92/354). Accepted.

2.     RASTER: Runtime Adaptive Spatial/Temporal Error Resiliency for Embedded Processors

        [HiPEAC Paper Award, 2013]

        Tuo Li, Mahammad Shafique, Jude Angelo Ambrose, Semeen Rehman, Jörg Henkel, Sri  Parameswaran

        DAC 2013, Austin, USA. Acceptance Rate: 21.7% (162/747)       

3.     CSER: HW/SW Methodology for Configurable Soft-Error Resilient Application Specific Instruction-Set Processor

        Tuo Li, Muhammad Shafique, Semeen Rehman, Swarnalatha Radhakrishnan, Roshan Ragel, Jude Angelo Ambrose, Jörg Henkel, Sri Parameswaran

        DATE 2013, Grenoble, France. Acceptance Rate: 24.8% (206/829)

4.     Fine-Grained Hardware/Software Methodology for Process Migration in MPSoCs

        [2nd Prize (1st in EE/CS Division) Deans Award for Excellence in Postgraduate Research in Faculty of Engineering. UNSW, 2012]

       Tuo Li, Jude Angelo Ambrose, Sri Parameswaran

       ICCAD 2012, San Jose, USA. Acceptance Rate: 24% (82/338)

5.     Reli: Hardware/Software Checkpoint and Recovery Scheme for Embedded Processors.

        Tuo Li, Roshan Ragel, Sri Parameswaran

        DATE 2012, Dresden, Germany. Acceptance Rate: 27%

6.     Resil: A Resiliency Hardware/Software Framework for ASIPs

        Tuo Li, Roshan Ragel, Sri Parameswaran

        SELSE 2010, Stanford University, USA

 

Academic Experience

Technical Program Committee  

•         International Conference on Industrial & Information Systems (ICIIS) 2013

Teaching Assistant/Tutor (University of New South Wales)

•         CS2121 Microprocessors and Interfacing

Conference Sub-reviewer (with Prof. Parameswaran, UNSW)

•         Design Automation Conference (DAC)

•         International Conference on Computer-Aided Design (ICCAD)

•         Design Automation and Test in Europe (DATE)

•         Real-Time and Embedded Technology and Applications Symposium (RTAS)

•         International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)

•         Asia and South Pacific Design Automation Conference (ASP-DAC)

•         International Conference on VLSI Design (VLSI Design)

Journal Sub-reviewer (with Dr. Ambrose, UNSW)

•         IEEE Transactions on Very Large Scale Integration Systems (TVLSI)

 

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Last update: November 5, 2013