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School of Computer Science & Engineering
University of New South Wales
 Advanced Operating Systems 
 COMP9242 2002/S2 

Exceptions and Excepters

L4/MIPS exception handling

Totally analogous to page faults:

• Each thread has an excepter
• If a thread triggers an exception, the kernel invokes the thread's excepter by:
  1. sending an IPC message to the pager on the faulter's behalf,
  2. catching the pager's reply and continue the faulter.
• The excepter may chose not to reply, leaving the excepting thread blocked forever.

L4/ix86 exception handling

Virtualisation of hardware:

• A thread installs its own interrupt vector, using (kernel-emulated) processor features.

The kernel handles some exceptions internally (TLB miss, system call).