School of Computer Science & Engineering
University of New South Wales
Advanced Operating Systems
COMP9242 2002/S2
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- Loads and stores executed in program order.
- Memory accesses of different CPUs are sequentialised.
- Traditionally used by many architectures.
|
CPU 0 |
| store |
r1, adr1 |
|
load |
r2, adr2 |
|
CPU 1 |
| store |
r1, adr2 |
|
load |
r2, adr1 |
- At least one CPU must load the other's new value.
Gernot Heiser
2002-10-11